SDR Lab Receiver Bench
A shared software-defined radio bench built to teach signal processing hands-on, starting from RTL-SDR dongles and moving toward an FPGA front end.
Implementation
Phase one — done — wraps RTL-SDR dongles and GNU Radio flowgraphs into a set of lab exercises: AM/FM demodulation, basic spectrum analysis, and a simple ADS-B decoder for tracking aircraft near campus. Phase two, in progress, is replacing the RTL-SDR with a small FPGA-based front end to get wider bandwidth and lower latency, and is the part of the project currently active.
Architecture
Phase one runs entirely in GNU Radio Companion flowgraphs feeding Python/Qt GUI sinks, no custom hardware beyond the RTL-SDR dongle. Phase two adds an FPGA (iCE40-based dev board) doing initial downconversion and decimation in hardware, streaming decimated IQ samples to the host over USB for the same GNU Radio backend to consume — the software stack is being kept identical on purpose so the lab exercises don't have to be rewritten.
Technologies
Known limitations
- Phase two FPGA front end is not yet functional end-to-end — downconversion works in simulation but hasn't been validated on real hardware.
- Lab exercises assume Linux; Windows/macOS setup is undocumented and known to have driver issues with the RTL-SDR dongles.
- No automated test bench yet — validation is currently done by comparing against a known-good commercial SDR by ear/eye.
Members
- Ethan Yoon
- Jiho Park